pwm: tiehrpwm: Enable pwmchip's parent device before setting configuration
[ Upstream commit 75e7ed52ac7c1da90f304dcda2906636404df921 ]
The period and duty cycle configurations on J7200 and J784S4 SoCs
does not get reflected after setting them using sysfs nodes.
This is because at the end of ehrpwm_pwm_config function,
the put_sync function is called which resets the hardware.
Hold the PWM controller out of low-power mode during .apply() to
make sure it accepts the writes to its registers.
This renders the calls to pm_runtime_get_sync() and
pm_runtime_put_sync() in ehrpwm_pwm_config() into no-ops, so
these can be dropped.
Fixes: 5f027d9b83 ("pwm: tiehrpwm: Implement .apply() callback")
Signed-off-by: Gokul Praveen <g-praveen@ti.com>
Suggested-by: Uwe Kleine-König <ukleinek@kernel.org>
Link: https://patch.msgid.link/20260121061134.15466-1-g-praveen@ti.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -237,8 +237,6 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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if (period_cycles < 1)
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period_cycles = 1;
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pm_runtime_get_sync(pwmchip_parent(chip));
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/* Update clock prescaler values */
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ehrpwm_modify(pc->mmio_base, TBCTL, TBCTL_CLKDIV_MASK, tb_divval);
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@ -290,8 +288,6 @@ static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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if (!(duty_cycles > period_cycles))
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ehrpwm_write(pc->mmio_base, cmp_reg, duty_cycles);
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pm_runtime_put_sync(pwmchip_parent(chip));
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return 0;
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}
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@ -378,6 +374,8 @@ static int ehrpwm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
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int err;
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bool enabled = pwm->state.enabled;
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guard(pm_runtime_active)(pwmchip_parent(chip));
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if (state->polarity != pwm->state.polarity) {
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if (enabled) {
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ehrpwm_pwm_disable(chip, pwm);
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