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arm64: dts: imx8mn-venice-gw7902: Increase HS400 USDHC clock speed 

The IMX8M reference manuals indicate in the USDHC Clock generator section
that the clock rate for DDR is 1/2 the input clock therefore HS400 rates
clocked at 200Mhz require a 400Mhz SDHC clock.

This showed about a 1.5x improvement in read performance for the eMMC's
used on the various imx8m{m,n,p}-venice boards.

Fixes: ef484dfcf6 ("arm64: dts: imx: Add i.mx8mm/imx8mn Gateworks gw7902 dts support")
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Tim Harvey 2025-07-07 13:17:00 -07:00 committed by Shawn Guo
parent abc4677277
commit 2ef45ff68c
1 changed files with 2 additions and 0 deletions
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arch/arm64/boot/dts/freescale/imx8mn-venice-gw7902.dts
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@ -693,6 +693,8 @@
pinctrl-0 = <&pinctrl_usdhc3>;
pinctrl-1 = <&pinctrl_usdhc3_100mhz>;
pinctrl-2 = <&pinctrl_usdhc3_200mhz>;
assigned-clocks = <&clk IMX8MN_CLK_USDHC3>;
assigned-clock-rates = <400000000>;
bus-width = <8>;
non-removable;
status = "okay";