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crypto: hisilicon/qm - move the barrier before writing to the mailbox register 

[ Upstream commit ebf35d8f9368816c930f5d70783a72716fab5e19 ]

Before sending the data via the mailbox to the hardware, to ensure
that the data accessed by the hardware is the most up-to-date,
a write barrier should be added before writing to the mailbox register.
The current memory barrier is placed after writing to the register,
the barrier order should be modified to be before writing to the register.

Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Chenghai Huang 2026-01-17 18:18:03 +08:00 committed by Sasha Levin
parent a048eb4e37
commit aaaa758294
1 changed files with 5 additions and 1 deletions
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6
drivers/crypto/hisilicon/qm.c
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@ -609,9 +609,13 @@ static void qm_mb_write(struct hisi_qm *qm, const void *src)
}
#if IS_ENABLED(CONFIG_ARM64)
/*
* The dmb oshst instruction ensures that the data in the
* mailbox is written before it is sent to the hardware.
*/
asm volatile("ldp %0, %1, %3\n"
"stp %0, %1, %2\n"
"dmb oshst\n"
"stp %0, %1, %2\n"
: "=&r" (tmp0),
"=&r" (tmp1),
"+Q" (*((char __iomem *)fun_base))