RDMA/ionic: Implement device stats ops
Implement device stats operations for hw stats and qp stats. Co-developed-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Allen Hubbe <allen.hubbe@amd.com> Signed-off-by: Abhijit Gangurde <abhijit.gangurde@amd.com> Link: https://patch.msgid.link/20250903061606.4139957-14-abhijit.gangurde@amd.com Signed-off-by: Leon Romanovsky <leon@kernel.org>
This commit is contained in:
Abhijit Gangurde
Leon Romanovsky
parent
2075bbe8ef
commit
ea4c399642
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@ -659,6 +659,17 @@ static inline int ionic_v1_use_spec_sge(int min_sge, int spec)
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return spec;
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}
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struct ionic_admin_stats_hdr {
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__le64 dma_addr;
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__le32 length;
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__le32 id_ver;
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__u8 type_state;
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} __packed;
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#define IONIC_ADMIN_STATS_HDRS_IN_V1_LEN 17
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static_assert(sizeof(struct ionic_admin_stats_hdr) ==
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IONIC_ADMIN_STATS_HDRS_IN_V1_LEN);
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struct ionic_admin_create_ah {
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__le64 dma_addr;
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__le32 length;
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@ -837,6 +848,7 @@ struct ionic_v1_admin_wqe {
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__le16 len;
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union {
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struct ionic_admin_stats_hdr stats;
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struct ionic_admin_create_ah create_ah;
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struct ionic_admin_destroy_ah destroy_ah;
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struct ionic_admin_query_ah query_ah;
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@ -983,4 +995,35 @@ static inline u32 ionic_v1_eqe_evt_qid(u32 evt)
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return evt >> IONIC_V1_EQE_QID_SHIFT;
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}
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enum ionic_v1_stat_bits {
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IONIC_V1_STAT_TYPE_SHIFT = 28,
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IONIC_V1_STAT_TYPE_NONE = 0,
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IONIC_V1_STAT_TYPE_8 = 1,
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IONIC_V1_STAT_TYPE_LE16 = 2,
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IONIC_V1_STAT_TYPE_LE32 = 3,
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IONIC_V1_STAT_TYPE_LE64 = 4,
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IONIC_V1_STAT_TYPE_BE16 = 5,
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IONIC_V1_STAT_TYPE_BE32 = 6,
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IONIC_V1_STAT_TYPE_BE64 = 7,
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IONIC_V1_STAT_OFF_MASK = BIT(IONIC_V1_STAT_TYPE_SHIFT) - 1,
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};
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struct ionic_v1_stat {
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union {
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__be32 be_type_off;
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u32 type_off;
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};
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char name[28];
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};
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static inline int ionic_v1_stat_type(struct ionic_v1_stat *hdr)
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{
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return hdr->type_off >> IONIC_V1_STAT_TYPE_SHIFT;
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}
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static inline unsigned int ionic_v1_stat_off(struct ionic_v1_stat *hdr)
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{
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return hdr->type_off & IONIC_V1_STAT_OFF_MASK;
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}
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#endif /* _IONIC_FW_H_ */
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@ -0,0 +1,484 @@
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// SPDX-License-Identifier: GPL-2.0
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/* Copyright (C) 2018-2025, Advanced Micro Devices, Inc. */
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#include <linux/dma-mapping.h>
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#include "ionic_fw.h"
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#include "ionic_ibdev.h"
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static int ionic_v1_stat_normalize(struct ionic_v1_stat *hw_stats,
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int hw_stats_count)
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{
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int hw_stat_i;
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for (hw_stat_i = 0; hw_stat_i < hw_stats_count; ++hw_stat_i) {
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struct ionic_v1_stat *stat = &hw_stats[hw_stat_i];
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stat->type_off = be32_to_cpu(stat->be_type_off);
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stat->name[sizeof(stat->name) - 1] = 0;
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if (ionic_v1_stat_type(stat) == IONIC_V1_STAT_TYPE_NONE)
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break;
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}
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return hw_stat_i;
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}
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static void ionic_fill_stats_desc(struct rdma_stat_desc *hw_stats_hdrs,
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struct ionic_v1_stat *hw_stats,
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int hw_stats_count)
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{
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int hw_stat_i;
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for (hw_stat_i = 0; hw_stat_i < hw_stats_count; ++hw_stat_i) {
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struct ionic_v1_stat *stat = &hw_stats[hw_stat_i];
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hw_stats_hdrs[hw_stat_i].name = stat->name;
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}
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}
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static u64 ionic_v1_stat_val(struct ionic_v1_stat *stat,
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void *vals_buf, size_t vals_len)
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{
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unsigned int off = ionic_v1_stat_off(stat);
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int type = ionic_v1_stat_type(stat);
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#define __ionic_v1_stat_validate(__type) \
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((off + sizeof(__type) <= vals_len) && \
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(IS_ALIGNED(off, sizeof(__type))))
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switch (type) {
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case IONIC_V1_STAT_TYPE_8:
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if (__ionic_v1_stat_validate(u8))
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return *(u8 *)(vals_buf + off);
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break;
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case IONIC_V1_STAT_TYPE_LE16:
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if (__ionic_v1_stat_validate(__le16))
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return le16_to_cpu(*(__le16 *)(vals_buf + off));
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break;
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case IONIC_V1_STAT_TYPE_LE32:
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if (__ionic_v1_stat_validate(__le32))
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return le32_to_cpu(*(__le32 *)(vals_buf + off));
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break;
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case IONIC_V1_STAT_TYPE_LE64:
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if (__ionic_v1_stat_validate(__le64))
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return le64_to_cpu(*(__le64 *)(vals_buf + off));
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break;
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case IONIC_V1_STAT_TYPE_BE16:
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if (__ionic_v1_stat_validate(__be16))
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return be16_to_cpu(*(__be16 *)(vals_buf + off));
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break;
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case IONIC_V1_STAT_TYPE_BE32:
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if (__ionic_v1_stat_validate(__be32))
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return be32_to_cpu(*(__be32 *)(vals_buf + off));
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break;
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case IONIC_V1_STAT_TYPE_BE64:
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if (__ionic_v1_stat_validate(__be64))
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return be64_to_cpu(*(__be64 *)(vals_buf + off));
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break;
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}
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return ~0ull;
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#undef __ionic_v1_stat_validate
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}
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static int ionic_hw_stats_cmd(struct ionic_ibdev *dev,
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dma_addr_t dma, size_t len, int qid, int op)
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{
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struct ionic_admin_wr wr = {
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.work = COMPLETION_INITIALIZER_ONSTACK(wr.work),
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.wqe = {
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.op = op,
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.len = cpu_to_le16(IONIC_ADMIN_STATS_HDRS_IN_V1_LEN),
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.cmd.stats = {
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.dma_addr = cpu_to_le64(dma),
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.length = cpu_to_le32(len),
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.id_ver = cpu_to_le32(qid),
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},
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}
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};
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if (dev->lif_cfg.admin_opcodes <= op)
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return -EBADRQC;
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ionic_admin_post(dev, &wr);
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return ionic_admin_wait(dev, &wr, IONIC_ADMIN_F_INTERRUPT);
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}
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static int ionic_init_hw_stats(struct ionic_ibdev *dev)
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{
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dma_addr_t hw_stats_dma;
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int rc, hw_stats_count;
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if (dev->hw_stats_hdrs)
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return 0;
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dev->hw_stats_count = 0;
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/* buffer for current values from the device */
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dev->hw_stats_buf = kzalloc(PAGE_SIZE, GFP_KERNEL);
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if (!dev->hw_stats_buf) {
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rc = -ENOMEM;
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goto err_buf;
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}
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/* buffer for names, sizes, offsets of values */
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dev->hw_stats = kzalloc(PAGE_SIZE, GFP_KERNEL);
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if (!dev->hw_stats) {
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rc = -ENOMEM;
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goto err_hw_stats;
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}
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/* request the names, sizes, offsets */
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hw_stats_dma = dma_map_single(dev->lif_cfg.hwdev, dev->hw_stats,
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PAGE_SIZE, DMA_FROM_DEVICE);
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rc = dma_mapping_error(dev->lif_cfg.hwdev, hw_stats_dma);
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if (rc)
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goto err_dma;
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rc = ionic_hw_stats_cmd(dev, hw_stats_dma, PAGE_SIZE, 0,
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IONIC_V1_ADMIN_STATS_HDRS);
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if (rc)
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goto err_cmd;
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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/* normalize and count the number of hw_stats */
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hw_stats_count =
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ionic_v1_stat_normalize(dev->hw_stats,
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PAGE_SIZE / sizeof(*dev->hw_stats));
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if (!hw_stats_count) {
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rc = -ENODATA;
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goto err_dma;
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}
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dev->hw_stats_count = hw_stats_count;
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/* alloc and init array of names, for alloc_hw_stats */
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dev->hw_stats_hdrs = kcalloc(hw_stats_count,
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sizeof(*dev->hw_stats_hdrs),
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GFP_KERNEL);
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if (!dev->hw_stats_hdrs) {
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rc = -ENOMEM;
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goto err_dma;
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}
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ionic_fill_stats_desc(dev->hw_stats_hdrs, dev->hw_stats,
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hw_stats_count);
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return 0;
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err_cmd:
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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err_dma:
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kfree(dev->hw_stats);
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err_hw_stats:
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kfree(dev->hw_stats_buf);
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err_buf:
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dev->hw_stats_count = 0;
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dev->hw_stats = NULL;
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dev->hw_stats_buf = NULL;
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dev->hw_stats_hdrs = NULL;
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return rc;
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}
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static struct rdma_hw_stats *ionic_alloc_hw_stats(struct ib_device *ibdev,
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u32 port)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
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if (port != 1)
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return NULL;
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return rdma_alloc_hw_stats_struct(dev->hw_stats_hdrs,
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dev->hw_stats_count,
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RDMA_HW_STATS_DEFAULT_LIFESPAN);
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}
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static int ionic_get_hw_stats(struct ib_device *ibdev,
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struct rdma_hw_stats *hw_stats,
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u32 port, int index)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
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dma_addr_t hw_stats_dma;
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int rc, hw_stat_i;
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if (port != 1)
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return -EINVAL;
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hw_stats_dma = dma_map_single(dev->lif_cfg.hwdev, dev->hw_stats_buf,
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PAGE_SIZE, DMA_FROM_DEVICE);
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rc = dma_mapping_error(dev->lif_cfg.hwdev, hw_stats_dma);
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if (rc)
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goto err_dma;
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rc = ionic_hw_stats_cmd(dev, hw_stats_dma, PAGE_SIZE,
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0, IONIC_V1_ADMIN_STATS_VALS);
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if (rc)
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goto err_cmd;
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma,
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PAGE_SIZE, DMA_FROM_DEVICE);
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for (hw_stat_i = 0; hw_stat_i < dev->hw_stats_count; ++hw_stat_i)
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hw_stats->value[hw_stat_i] =
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ionic_v1_stat_val(&dev->hw_stats[hw_stat_i],
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dev->hw_stats_buf, PAGE_SIZE);
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return hw_stat_i;
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err_cmd:
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma,
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PAGE_SIZE, DMA_FROM_DEVICE);
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err_dma:
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return rc;
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}
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static struct rdma_hw_stats *
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ionic_counter_alloc_stats(struct rdma_counter *counter)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(counter->device);
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struct ionic_counter *cntr;
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int err;
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cntr = kzalloc(sizeof(*cntr), GFP_KERNEL);
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if (!cntr)
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return NULL;
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/* buffer for current values from the device */
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cntr->vals = kzalloc(PAGE_SIZE, GFP_KERNEL);
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if (!cntr->vals)
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goto err_vals;
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err = xa_alloc(&dev->counter_stats->xa_counters, &counter->id,
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cntr,
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XA_LIMIT(0, IONIC_MAX_QPID),
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GFP_KERNEL);
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if (err)
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goto err_xa;
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INIT_LIST_HEAD(&cntr->qp_list);
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return rdma_alloc_hw_stats_struct(dev->counter_stats->stats_hdrs,
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dev->counter_stats->queue_stats_count,
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RDMA_HW_STATS_DEFAULT_LIFESPAN);
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err_xa:
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kfree(cntr->vals);
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err_vals:
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kfree(cntr);
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return NULL;
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}
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static int ionic_counter_dealloc(struct rdma_counter *counter)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(counter->device);
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struct ionic_counter *cntr;
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cntr = xa_erase(&dev->counter_stats->xa_counters, counter->id);
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if (!cntr)
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return -EINVAL;
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kfree(cntr->vals);
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kfree(cntr);
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return 0;
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}
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static int ionic_counter_bind_qp(struct rdma_counter *counter,
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struct ib_qp *ibqp,
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u32 port)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(counter->device);
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struct ionic_qp *qp = to_ionic_qp(ibqp);
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struct ionic_counter *cntr;
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cntr = xa_load(&dev->counter_stats->xa_counters, counter->id);
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if (!cntr)
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return -EINVAL;
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list_add_tail(&qp->qp_list_counter, &cntr->qp_list);
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ibqp->counter = counter;
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return 0;
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}
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static int ionic_counter_unbind_qp(struct ib_qp *ibqp, u32 port)
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{
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struct ionic_qp *qp = to_ionic_qp(ibqp);
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if (ibqp->counter) {
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list_del(&qp->qp_list_counter);
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ibqp->counter = NULL;
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}
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return 0;
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}
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static int ionic_get_qp_stats(struct ib_device *ibdev,
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struct rdma_hw_stats *hw_stats,
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u32 counter_id)
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{
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struct ionic_ibdev *dev = to_ionic_ibdev(ibdev);
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struct ionic_counter_stats *cs;
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struct ionic_counter *cntr;
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dma_addr_t hw_stats_dma;
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struct ionic_qp *qp;
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int rc, stat_i = 0;
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cs = dev->counter_stats;
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cntr = xa_load(&cs->xa_counters, counter_id);
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if (!cntr)
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return -EINVAL;
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hw_stats_dma = dma_map_single(dev->lif_cfg.hwdev, cntr->vals,
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PAGE_SIZE, DMA_FROM_DEVICE);
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rc = dma_mapping_error(dev->lif_cfg.hwdev, hw_stats_dma);
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if (rc)
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return rc;
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memset(hw_stats->value, 0, sizeof(u64) * hw_stats->num_counters);
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list_for_each_entry(qp, &cntr->qp_list, qp_list_counter) {
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rc = ionic_hw_stats_cmd(dev, hw_stats_dma, PAGE_SIZE,
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qp->qpid,
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IONIC_V1_ADMIN_QP_STATS_VALS);
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if (rc)
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goto err_cmd;
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for (stat_i = 0; stat_i < cs->queue_stats_count; ++stat_i)
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hw_stats->value[stat_i] +=
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ionic_v1_stat_val(&cs->hdr[stat_i],
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cntr->vals,
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PAGE_SIZE);
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}
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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return stat_i;
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err_cmd:
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dma_unmap_single(dev->lif_cfg.hwdev, hw_stats_dma, PAGE_SIZE, DMA_FROM_DEVICE);
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return rc;
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}
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static int ionic_counter_update_stats(struct rdma_counter *counter)
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{
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return ionic_get_qp_stats(counter->device, counter->stats, counter->id);
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}
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static int ionic_alloc_counters(struct ionic_ibdev *dev)
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{
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struct ionic_counter_stats *cs = dev->counter_stats;
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int rc, hw_stats_count;
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dma_addr_t hdr_dma;
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/* buffer for names, sizes, offsets of values */
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cs->hdr = kzalloc(PAGE_SIZE, GFP_KERNEL);
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if (!cs->hdr)
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return -ENOMEM;
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hdr_dma = dma_map_single(dev->lif_cfg.hwdev, cs->hdr,
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PAGE_SIZE, DMA_FROM_DEVICE);
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rc = dma_mapping_error(dev->lif_cfg.hwdev, hdr_dma);
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if (rc)
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goto err_dma;
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rc = ionic_hw_stats_cmd(dev, hdr_dma, PAGE_SIZE, 0,
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IONIC_V1_ADMIN_QP_STATS_HDRS);
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if (rc)
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goto err_cmd;
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|
||||
dma_unmap_single(dev->lif_cfg.hwdev, hdr_dma, PAGE_SIZE, DMA_FROM_DEVICE);
|
||||
|
||||
/* normalize and count the number of hw_stats */
|
||||
hw_stats_count = ionic_v1_stat_normalize(cs->hdr,
|
||||
PAGE_SIZE / sizeof(*cs->hdr));
|
||||
if (!hw_stats_count) {
|
||||
rc = -ENODATA;
|
||||
goto err_dma;
|
||||
}
|
||||
|
||||
cs->queue_stats_count = hw_stats_count;
|
||||
|
||||
/* alloc and init array of names */
|
||||
cs->stats_hdrs = kcalloc(hw_stats_count, sizeof(*cs->stats_hdrs),
|
||||
GFP_KERNEL);
|
||||
if (!cs->stats_hdrs) {
|
||||
rc = -ENOMEM;
|
||||
goto err_dma;
|
||||
}
|
||||
|
||||
ionic_fill_stats_desc(cs->stats_hdrs, cs->hdr, hw_stats_count);
|
||||
|
||||
return 0;
|
||||
|
||||
err_cmd:
|
||||
dma_unmap_single(dev->lif_cfg.hwdev, hdr_dma, PAGE_SIZE, DMA_FROM_DEVICE);
|
||||
err_dma:
|
||||
kfree(cs->hdr);
|
||||
|
||||
return rc;
|
||||
}
|
||||
|
||||
static const struct ib_device_ops ionic_hw_stats_ops = {
|
||||
.driver_id = RDMA_DRIVER_IONIC,
|
||||
.alloc_hw_port_stats = ionic_alloc_hw_stats,
|
||||
.get_hw_stats = ionic_get_hw_stats,
|
||||
};
|
||||
|
||||
static const struct ib_device_ops ionic_counter_stats_ops = {
|
||||
.counter_alloc_stats = ionic_counter_alloc_stats,
|
||||
.counter_dealloc = ionic_counter_dealloc,
|
||||
.counter_bind_qp = ionic_counter_bind_qp,
|
||||
.counter_unbind_qp = ionic_counter_unbind_qp,
|
||||
.counter_update_stats = ionic_counter_update_stats,
|
||||
};
|
||||
|
||||
void ionic_stats_init(struct ionic_ibdev *dev)
|
||||
{
|
||||
u16 stats_type = dev->lif_cfg.stats_type;
|
||||
int rc;
|
||||
|
||||
if (stats_type & IONIC_LIF_RDMA_STAT_GLOBAL) {
|
||||
rc = ionic_init_hw_stats(dev);
|
||||
if (rc)
|
||||
ibdev_dbg(&dev->ibdev, "Failed to init hw stats\n");
|
||||
else
|
||||
ib_set_device_ops(&dev->ibdev, &ionic_hw_stats_ops);
|
||||
}
|
||||
|
||||
if (stats_type & IONIC_LIF_RDMA_STAT_QP) {
|
||||
dev->counter_stats = kzalloc(sizeof(*dev->counter_stats),
|
||||
GFP_KERNEL);
|
||||
if (!dev->counter_stats)
|
||||
return;
|
||||
|
||||
rc = ionic_alloc_counters(dev);
|
||||
if (rc) {
|
||||
ibdev_dbg(&dev->ibdev, "Failed to init counter stats\n");
|
||||
kfree(dev->counter_stats);
|
||||
dev->counter_stats = NULL;
|
||||
return;
|
||||
}
|
||||
|
||||
xa_init_flags(&dev->counter_stats->xa_counters, XA_FLAGS_ALLOC);
|
||||
|
||||
ib_set_device_ops(&dev->ibdev, &ionic_counter_stats_ops);
|
||||
}
|
||||
}
|
||||
|
||||
void ionic_stats_cleanup(struct ionic_ibdev *dev)
|
||||
{
|
||||
if (dev->counter_stats) {
|
||||
xa_destroy(&dev->counter_stats->xa_counters);
|
||||
kfree(dev->counter_stats->hdr);
|
||||
kfree(dev->counter_stats->stats_hdrs);
|
||||
kfree(dev->counter_stats);
|
||||
dev->counter_stats = NULL;
|
||||
}
|
||||
|
||||
kfree(dev->hw_stats);
|
||||
kfree(dev->hw_stats_buf);
|
||||
kfree(dev->hw_stats_hdrs);
|
||||
}
|
||||
|
|
@ -289,6 +289,7 @@ static void ionic_destroy_ibdev(struct ionic_ibdev *dev)
|
|||
{
|
||||
ionic_kill_rdma_admin(dev, false);
|
||||
ib_unregister_device(&dev->ibdev);
|
||||
ionic_stats_cleanup(dev);
|
||||
ionic_destroy_rdma_admin(dev);
|
||||
ionic_destroy_resids(dev);
|
||||
WARN_ON(!xa_empty(&dev->qp_tbl));
|
||||
|
|
@ -346,6 +347,8 @@ static struct ionic_ibdev *ionic_create_ibdev(struct ionic_aux_dev *ionic_adev)
|
|||
|
||||
ib_set_device_ops(&dev->ibdev, &ionic_dev_ops);
|
||||
|
||||
ionic_stats_init(dev);
|
||||
|
||||
rc = ib_register_device(ibdev, "ionic_%d", ibdev->dev.parent);
|
||||
if (rc)
|
||||
goto err_register;
|
||||
|
|
@ -353,6 +356,7 @@ static struct ionic_ibdev *ionic_create_ibdev(struct ionic_aux_dev *ionic_adev)
|
|||
return dev;
|
||||
|
||||
err_register:
|
||||
ionic_stats_cleanup(dev);
|
||||
err_admin:
|
||||
ionic_kill_rdma_admin(dev, false);
|
||||
ionic_destroy_rdma_admin(dev);
|
||||
|
|
|
|||
|
|
@ -30,6 +30,7 @@
|
|||
#define IONIC_PKEY_TBL_LEN 1
|
||||
#define IONIC_GID_TBL_LEN 256
|
||||
|
||||
#define IONIC_MAX_QPID 0xffffff
|
||||
#define IONIC_SPEC_HIGH 8
|
||||
#define IONIC_MAX_PD 1024
|
||||
#define IONIC_SPEC_HIGH 8
|
||||
|
|
@ -109,6 +110,12 @@ struct ionic_ibdev {
|
|||
atomic_t admin_state;
|
||||
|
||||
struct ionic_eq **eq_vec;
|
||||
|
||||
struct ionic_v1_stat *hw_stats;
|
||||
void *hw_stats_buf;
|
||||
struct rdma_stat_desc *hw_stats_hdrs;
|
||||
struct ionic_counter_stats *counter_stats;
|
||||
int hw_stats_count;
|
||||
};
|
||||
|
||||
struct ionic_eq {
|
||||
|
|
@ -320,6 +327,18 @@ struct ionic_mr {
|
|||
bool created;
|
||||
};
|
||||
|
||||
struct ionic_counter_stats {
|
||||
int queue_stats_count;
|
||||
struct ionic_v1_stat *hdr;
|
||||
struct rdma_stat_desc *stats_hdrs;
|
||||
struct xarray xa_counters;
|
||||
};
|
||||
|
||||
struct ionic_counter {
|
||||
void *vals;
|
||||
struct list_head qp_list;
|
||||
};
|
||||
|
||||
static inline struct ionic_ibdev *to_ionic_ibdev(struct ib_device *ibdev)
|
||||
{
|
||||
return container_of(ibdev, struct ionic_ibdev, ibdev);
|
||||
|
|
@ -480,6 +499,10 @@ int ionic_post_recv(struct ib_qp *ibqp, const struct ib_recv_wr *wr,
|
|||
int ionic_poll_cq(struct ib_cq *ibcq, int nwc, struct ib_wc *wc);
|
||||
int ionic_req_notify_cq(struct ib_cq *ibcq, enum ib_cq_notify_flags flags);
|
||||
|
||||
/* ionic_hw_stats.c */
|
||||
void ionic_stats_init(struct ionic_ibdev *dev);
|
||||
void ionic_stats_cleanup(struct ionic_ibdev *dev);
|
||||
|
||||
/* ionic_pgtbl.c */
|
||||
__le64 ionic_pgtbl_dma(struct ionic_tbl_buf *buf, u64 va);
|
||||
__be64 ionic_pgtbl_off(struct ionic_tbl_buf *buf, u64 va);
|
||||
|
|
|
|||
Loading…
Reference in New Issue